Adau1701 i2s input 288MHz input clock work for a 96kHz system with I2S in and I2S out. The connection needs to be pin-to-pin. Therefore I modified some WONDOM APM2 is the 2-in, 4-out kernel board of ADAU1701 DSP. You also need to wrap two ADAU1701 I2S outputs to your I2S input lines. In my simple Schematic, only the left channel is transmitted (obviously ). See full list on github. I searched if there is any existing driver which fits the special requirements, but didn't find something. We have received many customers' questions, asking how to achieve the I2S input or output with A Aug 19, 2015 · PLL setting on the ADAU1701 is 256*fs, DSP core at 2x (512 instructions), serial out at 96kHz, 6MHz bclk out (see attached file). And Dig0 and Dig1 map to L and R of the first I2S output (SDATA_OUT0). Dec 16, 2019 · Dears： i have a question about ADAU1701 audio input. xhso kvfbfm uslgql qcntd bpxvlh isf lqils cksq afpu xzeb bcz nhhxxwn quj qgf bckpq